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| HELP2TM Dual-band Cellular/PCS CDMA 3.4 V Linear Power Amplifier Module Data Sheet - Rev 2.2 * * AWT6321 FEATURES InGaP HBT Technology High Efficiency: 19 % @ +16 dBm 39 % @ +28 dBm * * * * * * * * Low Quiescent Current: 15 mA Internal Voltage Regulation Common VMODE Control Line Simplified VCC Bus PCB routing Reduced External Component Count Low Profile Surface Mount Package: 1 mm RoHS Compliant Package, 250 oC MSL-3 Suitable for BC10 (806-824 MHz) band applications APPLICATIONS * CDMA/EVDO & Cell & PCS Dual-band Wireless Handsets and Data Devices M28 Package 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module 1 mm surface mount package incorporates matching networks optimized for output power, efficiency and linearity in a 50 system. The AWT6321 addresses the demand for increased integration in dual-band handsets for North American CDMA network deployments. The small footprint 3 mm x 5 mm x 1 mm surface mount RoHS compliant package contains independent RF PA paths to ensure optimal performance in both frequency bands, while achieving a 25% PCB space savings compared with solutions requiring two single-band PAs. The package pinout was chosen to enable handset manufacturers to easily route VCC to both power amplifiers and simplify control with a common VMODE pin. The device is manufactured on an advanced InGaP HBT MMIC technology offering state-of-the-art reliability, temperature stability, and ruggedness. The AWT6321 is part of ANADIGICS' High-Efficiency-at-Low-Power (HELPTM) family of CDMA power amplifiers, which deliver low quiescent currents and significantly greater efficiency without a costly external DAC or DC-DC converter. Through selectable bias modes, the AWT6321 achieves optimal efficiency across different output power levels, specifically at low- and midrange power levels where the PA typically operates, thereby dramatically increasing handset talk-time and standby-time. Its built-in voltage regulator eliminates the need for external switches. The 3 mm x 5 mm x PRODUCT DESCRIPTION Figure 1: Block Diagram 10/2008 AWT6321 Figure 2: Pinout Table 1: Pin Description PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NAME VEN_CELL RFIN_CELL VMODE VBATT N/C RFIN_PCS VEN_PCS RFOUT_PCS GND GND VCCA VCC DESCRIPTION Enable Voltage for Cell Band RF Input for Cell Band Mode Control Voltage for Cell and PCS Bands Battery Voltage No Connection RF Input for PCS Band Enable Voltage for PCS Band RF Output for PCS Band Ground Ground Battery Voltage A Supply Voltage RFOUT_CELL RF Output for Cell Band GND Ground Data Sheet - Rev 2.2 10/2008 2 AWT6321 ELECTRICAL CHARACTERISTICS Table 2: Absolute Minimum and Maximum Ratings PARAMETER Supply Voltage (VBATT, VCC, VCCA) Mode Control Voltage (VMODE) Enable Voltage (VEN_CELL, VEN_PCS) RF Input Power (PIN) Storage Temperature (TSTG) MIN 0 0 0 -40 MAX +5 +3.5 +3.5 +10 +150 UNIT V V V dBm C Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Table 3: Operating Ranges PARAMETER Operating Frequency (f) Supply Voltage (VCC and VBATT) Enable Voltage (VEN) Mode Control Voltage (VMODE) Cellular RF Output Power (POUT) CDMA PCS RF Output Power (POUT) CDMA Case Temperature (TC) MIN 824 1850 +3.2 +2.2 0 +2.2 0 +27.5 +27.5 -30 (1) TYP +3.4 +2.4 +2.4 +28.0 +28.0 - MAX 849 1915 +4.2 +3.1 +0.5 +3.1 +0.5 +85 UNIT MHz V V V dBm dBm C COMMENTS Cellular PCS PA "on" PA "shut down" Low Bias Mode High Bias Mode (1) The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. Notes: (1) For operation at VCC = +3.2 V, POUT is derated by 0.5 dB. Data Sheet - Rev 2.2 10/2008 3 AWT6321 Table 4: Electrical Specifications - Cellular Band (TC = +25 C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 system, IS-95 uplink waveform) PARAMETER MIN 24.0 15.0 15.5 TYP 26.0 16.5 17.0 MAX 29.0 19.0 20.0 UNIT dB COMMENTS POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V POUT = +17 dBm, VMODE = +2.4 V, VCC = +3.7 V Gain Adjacent Channel Power at 885 kHz offset (1) Primary Channel BW = 1.23 MHZ Adjacent Channel BW = 30 kHz - -50 -53 -53 -46.5 -47 -47 dBc POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V POUT = +17 dBm, VMODE = +2.4 V, VCC = +3.7 V Adjacent Channel Power at 1.98 MHz offset (1) Primary Channel BW = 1.23 MHZ Adjacent Channel BW = 30 kHz Power-Added Efficiency (1) Quiescent Current (Icq) Enable Current Battery Current Mode Control Current Leakage Current Noise in Receive Band Harmonics 2fo 3fo, 4fo Input Impedance 36 18 - -65 -60 39 22 15 0.4 2.5 0.75 <1 -133 -42 -50 - -57 -57 20 0.8 5 1.0 5 -131 -30 -30 2:1 dBc % mA mA mA mA A dBm/Hz dBc VSWR POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V VMODE = +2.4 V, Low Bias through VEN pin, VMODE = +2.4 V through VBATT pin, VMODE = +2.4 V through VMODE pin, VMODE = +2.4 V VCC = +4.2 V, VEN = 0 V, VMODE = 0 V 869 MHz to 894 MHz Spurious Output Level (all spurious outputs) - - -65 dBc POUT < +28 dBm In-band Load VSWR < 5:1 Out-of-band Load VSWR < 10:1 Applies over all operating conditions Applies over all operating conditions Load mismatch stress with no permanent degradation or failure 8:1 - - VSWR Notes: (1) PAE and ACP limit applies at 836.5 MHz. 4 Data Sheet - Rev 2.2 10/2008 AWT6321 Table 5: Electrical Specifications - PCS Band (TC = +25 C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 system, IS-95 uplink waveform) PARAMETER MIN 25.0 12.5 13.0 TYP 27.0 14.5 15.5 MAX 30.0 17.0 18.0 UNIT COMMENTS POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V POUT = +18 dBm, VMODE = +2.4 V, VCC = +3.7 V Gain dB Adjacent Channel Power at +1.25 MHz offset Primary Channel BW =1.23 MHz Adjacent Channel BW = 30 kHz - -50 -55 -51 -46.5 -47 -47 dBc POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V POUT = +18 dBm, VMODE = +2.4 V, VCC = +3.7 V Adjacent Channel Power at + 1.98 MHz offset Primary Channel = 1.23 MHz Adjacent Channel = 30 kHz Adjacent Channel Power at +2.25 MHz offset Primary Channel BW =1.23 MHz Adjacent Channel BW = 30 kHz Power-Added Efficiency Quiescent Current (Icq) Enable Current Mode Control Current Battery Current Leakage Current Noise in Receive Band Harmonics 2fo 3fo, 4fo Input Impedance Spurious Output Level (all spurious outputs) Load mismatch stress with no permanent degradation or failure - -56 -56 -53 -53 dBc POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V 35.5 15 - -63 -61 39 17 15 0.3 0.75 3 <1 -134 -43 -55 - -57 -57 20 0.8 1.0 5 5 -132 -30 -30 2:1 dBc % mA mA mA mA A POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V POUT = +28 dBm, VMODE = 0 V POUT = +16 dBm, VMODE = +2.4 V through VCC pin, VMODE = +2.4 V through VEN pin, PA "on" through VMODE pin, VMODE = +2.4 V through VBATT pin, VMODE = +2.4 V VCC = +4.2 V, VEN = 0 V, VMODE = 0 V dBm/Hz 1930 MHz to 1990 MHz dBc VSWR POUT < +28 dBm In-band load VSWR < 5:1 Out-of-band load VSWR < 10:1 Applies over all operating ranges Applies over full operating range - - -65 dBc 8:1 - - VSWR Notes: 1. ACPRs and Efficiency limits at mid-band only. Data Sheet - Rev 2.2 10/2008 5 AWT6321 APPLICATION INFORMATION To ensure proper performance, refer to all related Application Notes on the ANADIGICS web site: http://www.anadigics.com Shutdown Mode The power amplifier may be placed in a shutdown mode by applying logic low levels (see Operating Ranges table) to the VENABLE and VMODE voltages. Bias Modes The power amplifier may be placed in either a Low Bias mode or a High Bias mode by applying the appropriate logic level (see Operating Ranges table) to the VMODE voltages. The Bias Control table lists the recommended modes of operation for various applications. Table 6: Bias Control APPLICATION CDMA - low power CDMA - high power Optional lower VCC in low power mode Shutdown POUT LEVELS < +16 dBm > +16 dBm < +7 dBm BIAS MODE Low High Low Shutdown VENABLE +2.4 V +2.4 V +2.4 V 0V VMODE +2.4 V 0V +2.4 V 0V VCC 3.2 - 4.2 V 3.2 - 4.2 V 1.5 V 3.2 - 4.2 V VBATT > 3.2 V > 3.2 V > 3.2 V > 3.2 V GND at slug (pad) VEN_CELL (1) 0.01 F (2) 1 Bias Control 2 14 GND (2) RFIN_CELL TRL1 13 TRL2 68 pF RFOUT_CELL VMODE 3 12 1000 pF (3) VCC VBATT 2.2 F 4 11 TRL5 10 F N/C 5 (1) 10 GND RFIN_PCS (2) TRL3 6 Bias Control 9 GND (2) VEN_PCS 0.01 F 7 8 TRL4 15 pF RFOUT_PCS GND Note: (1) Add blocking cap if DC voltage is present on input pin. (2) TRL should be short and of 50 characteristic impedance. (3) TRL 5 should be as long as possible (minimum of 0.1 at 800 MHz) and capable of handling 1200 mA current. Figure 3: Application Circuit 6 Data Sheet - Rev 2.2 10/2008 AWT6321 PACKAGE OUTLINE Figure 4: Package Outline - 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module Figure 5: Branding Specification Data Sheet - Rev 2.2 10/2008 7 AWT6321 ORDERING INFORMATION ORDER NUMBER AWT6321RM28Q7 TEMPERATURE RANGE -20 C to +85 C PACKAGE DESCRIPTION RoHS Compliant 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module RoHS Compliant 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module COMPONENT PACKAGING Tape and Reel, 2500 pieces per Reel AWT6321RM28P9 -20 C to +85 C Partial Tape and Reel ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com E-mail: Mktg@anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a product's formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. WARNING 8 Data Sheet - Rev 2.2 10/2008 |
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